Dynamic Effects in p-GaN Gate GaN-on-Si Heterojunction Field Effect Transistors

GaN-on-Si technology for power applications promises the superior electronic performance of GaN on low-cost Si substrates, exploiting the ability of manufacturing lateral heterojunction field-effect transistors (HFETs) on large size Si wafers, which can be processed in existing silicon production lines. Moreover, reliable enhancement-mode operation can be achieved with p-GaN gate technology. However, the performance of such devices can be severely degraded by dynamic effects arising from the p-GaN gate operation and nonidealities connected with the epitaxial platform. Several physical aspects of p-GaN gate HFETs have been investigated. First, we have clarified the origin and the nature of the vertical leakage current through the GaN-on-Si epitaxial stack, for its critical impact on both the static and the dynamic device performance. Then, we have investigated the threshold voltage instabilities related to charge storage in the p-GaN gate, demonstrating a correlation between the gate current and the threshold voltage variations, which is of significant importance for the device design. Finally, we report a study on the dynamic on-resistance increase in carbon-doped devices, that still remains one of the major challenges for GaN-on-Si technology.