Dynamic reconfiguration of FPGA offers a great range of possibilities for the implementation of complex systems where the minimization of silicon area, the reduction of the power budget and the possibility to implement fault mitigation techniques are important requirements. This work reports about an application of dynamic reconfiguration applied to the control electronics of a scientific space experiment module. The goal of this work is to demonstrate the benefit achieved from the design of complex systems based on the dynamic re-configuration of SRAM based FPGA Dynamic reconfiguration has been achieved by using tools and methodology purposely developed within the European Community Project RECONF. The tools and the methodology are briefly presented in the paper to highlight their capabilities and applicability. A practical control application has been developed and we report about the comparative results of a dynamic reconfigurable implementation versus an implementation with an OTP FPGA
Digital Design of Complex Systems: Methodology and Tools for the Dynamic Reconfiguration of FPGA applied to a real world case
2006
Abstract
Dynamic reconfiguration of FPGA offers a great range of possibilities for the implementation of complex systems where the minimization of silicon area, the reduction of the power budget and the possibility to implement fault mitigation techniques are important requirements. This work reports about an application of dynamic reconfiguration applied to the control electronics of a scientific space experiment module. The goal of this work is to demonstrate the benefit achieved from the design of complex systems based on the dynamic re-configuration of SRAM based FPGA Dynamic reconfiguration has been achieved by using tools and methodology purposely developed within the European Community Project RECONF. The tools and the methodology are briefly presented in the paper to highlight their capabilities and applicability. A practical control application has been developed and we report about the comparative results of a dynamic reconfigurable implementation versus an implementation with an OTP FPGAFile | Dimensione | Formato | |
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https://hdl.handle.net/20.500.14242/144319
URN:NBN:IT:UNIPI-144319