The increase of electrical energy demand and the successful development of power electronics has led to an exponential growth of interest in DC systems due to their inherent advantages of increased efficiency and lack of reactive power. This has inevitably led to question the effectiveness of conventional protection system, such as fuses and mechanical circuit breakers, in this emerging applications. Therefore, this research project adopts a holistic approach, to analyse the industrial and academic landscape surrounding modern protection systems such as solid state circuit breakers. The main objective is to understand how key components, such as the power semiconductor itself and the overvoltage protection circuit, behave under extreme operating conditions like during short circuits. In this thesis some sizing criteria are proposed and electrical performances are evaluated considering also the protection algorithms. To reduce the electrothermal stresses on power electronics, an integration with fault current limiting devices is proposed. Moreover, some investigations are conducted on SiC MOSFET gate oxide reliability in the specific operating conditions of SSCB. Finally, after thorough experimental validations are presented, conclusions are drawn and suggestions are given on possible future steps, especially considering technological developments of power electronic devices.
L’aumento dei consumi di energia elettrica e il rapido sviluppo dell’elettronica di potenza hanno portato a una crescita esponenziale dell’interesse verso i sistemi in corrente continua, grazie ai loro vantaggi intrinseci in termini di maggiore efficienza e assenza di potenza reattiva. Questo ha inevitabilmente portato a mettere in discussione l’efficacia dei sistemi di protezione convenzionali, come fusibili e interruttori meccanici, in queste nuove applicazioni. Pertanto, la presente ricerca adotta un approccio olistico per analizzare il panorama industriale e accademico relativo ai moderni sistemi di protezione per reti DC, con particolare attenzione agli interruttori a stato solido. L’obiettivo principale è comprendere come componenti chiave, quali il semiconduttore stesso e il circuito di protezione da sovratensioni, si comportino in condizioni operative estreme, come durante i cortocircuiti. In questa tesi, vengono proposti alcuni criteri di dimensionamento e vengono valutate le prestazioni elettriche complessive degli interruttori a stato solido tenendo anche conto degli algoritmi di protezione. Al fine di ridurre le sollecitazioni elettrotermiche sui semiconduttori, si propone l’integrazione con dispositivi di limitazione della corrente di guasto. Inoltre, vengono condotte alcune indagini sulla affidabilità dell’ossido di gate dei MOSFET al carburo di silicio nelle specifiche condizioni operative degli interruttori a stato solido. Infine, dopo aver presentato approfondite validazioni sperimentali, vengono tratte le conclusioni e fornite indicazioni sui possibili sviluppi futuri, con particolare attenzione all’evoluzione tecnologica dei dispositivi semiconduttori di potenza.
Solid state protection of DC systems: overview, interruption performances and auxiliary devices
Gregis, Gioele
2026
Abstract
The increase of electrical energy demand and the successful development of power electronics has led to an exponential growth of interest in DC systems due to their inherent advantages of increased efficiency and lack of reactive power. This has inevitably led to question the effectiveness of conventional protection system, such as fuses and mechanical circuit breakers, in this emerging applications. Therefore, this research project adopts a holistic approach, to analyse the industrial and academic landscape surrounding modern protection systems such as solid state circuit breakers. The main objective is to understand how key components, such as the power semiconductor itself and the overvoltage protection circuit, behave under extreme operating conditions like during short circuits. In this thesis some sizing criteria are proposed and electrical performances are evaluated considering also the protection algorithms. To reduce the electrothermal stresses on power electronics, an integration with fault current limiting devices is proposed. Moreover, some investigations are conducted on SiC MOSFET gate oxide reliability in the specific operating conditions of SSCB. Finally, after thorough experimental validations are presented, conclusions are drawn and suggestions are given on possible future steps, especially considering technological developments of power electronic devices.| File | Dimensione | Formato | |
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https://hdl.handle.net/20.500.14242/384807
URN:NBN:IT:POLIMI-384807