Modeling and Synthesis of the Network in Distributed Embedded Systems

Design of distributed embedded applications is a novel challenging task and it requires to raise the level of abstraction to overcome the complexity of the design. In particular, modeling languages and semantic specification are necessary to address network description at this level of the abstraction. In order to verify the network design model and reach the actual implementation, model manipulation and code generation are needed not only for simulation and performance analysis of the design model but also to refine the model and reduce the level of abstraction. In this work, I propose the use of UML diagrams combined with a formal computational model as a key solution to generate code, solve the network design problem, and manipulate each solution to generate different network alternatives. This thesis proposes a formal framework and supporting tools to capture the application requirements, the library of network components, the environment description, and the rules to compose them. The framework allows to generate code for design validation by simulation and provides back annotation mechanism of the simulation results to refine the original model. The resulting code is used in the final implementation of the network. Moreover, the framework abstracts existing heterogeneous IPs for component reuse.