REPROGRAMMABLE THRESHOLD LOGIC GATES BASED ON RANDOM NANOSTRUCTURED NETWORKS FOR ALGEBRAIC AND LOGIC BOOLEAN COMPUTATION

Decades of research demonstrated the remarkable advantages of threshold logic (TL), but to this day many limits hampered TL’s commercial success. While memristors have demonstrated that memory need not be separated from computation, the fine-tuning of their analog conductance appears to cut out all the advantages that their inexpensive design brought with them. The overcoming of these limitations does not call for the development of novel materials with superior performances: we instead proposed a novel paradigm, the Receptron, which cuts out most of the problematic hardware requirements. This abstract computational model, which inspired optical and electronic implementations, leverages a more complex, nonlinear weighting mechanism to widen the spectrum of TL-computable functions. We have shown that thanks to nonlinearity a Receptrons can implement any Boolean function, and due to the multitude of possible configurations, can rely on a random exploration of weights’ space for an efficient generation of Boolean functions. Nonlinearity and random reprogrammability are naturally exhibited by complex nanostructured media, such as Au Cluster-Assembled thin films (Au-CLASS). These defect-rich systems, in fact, display peculiar electrical conduction characteristics, among which a non-ohmic I-V curve and threshold-type resistive switching. In my work I have exploited these random-assembled nanostructures to build an electronic receptron. I have fabricated and characterized multielectrode Au-CLASS in terms of their (trans)conductance and resistive-switching properties. The integration of these elements into a custom designed printed circuit board (PCBs) lead to the development of the first standalone receptron-based nonlinear TLG for Boolean function generation. I have proved that the random reprogramming is possible thanks to CLASS’ mild sub-linearity, with significant simplifications in each Receptron’s training, allowing for an easy integration of several units into a more complex, layered architecture. I have thus developed a four-receptrons, 5-input-bit to 3-output-bit, Arithmetic Logic Unit (r-ALU), which can cover all the most relevant algebraic and logic operations. An ad hoc motherboard, equipped with a microcontroller and the necessary firmware, supervises the automatic programming of the r-ALU: the user only needs to specify the target(s) and wait for the system to converge to it. Compared to traditional circuit designs, the r-ALU is easily scalable and reprogrammable: not only its functioning is not limited to a predefined list of operations, but we are allowed to manipulate each bit in a much more flexible way, exchanging and rearranging functional blocks. Its architecture is robust and adaptive, since each receptron can compensate for the limited efficiency of some of the other components or for long-term changes in the components or the environment (e.g. in the form of inputs or voltage supplies). The flexibility and plasticity of these novel reprogrammable components prompt a paradigmatic shift from instruction-based to data-based computation: complex data processing tasks need not be decomposed in a series of simpler operations (procedural approach), but instead a single, compound, and ad hoc manipulation of data can take place all at once.