An 8-bit 800 MS/s Voltage and Time Domain Hybrid ADC Design

The main goal of this work is to have a suitable ADC design that is going to be used as the unit converter in a time interleaved ADC structure for higher conversion rates. To keep the input capacitance at minimum while preserving high conversion speed, a hybrid structure of time based ADC and a flash ADC conversion scheme is utilized. A new time to digital converter (TDC) with free running oscillator as time domain quantizer is introduced instead of using a conventional voltage controlled oscillator (VCO) to relax the oscillator design constraints. Several circuit techniques are introduced to minimize the non-ideal effects coming from the voltage and time domain converter discrepancy. A proof-of-concept test chip of 8-bit 800 MS/s ADC circuit is designed and taped out in TSMC 65nm CMOS technology node with 1.2V supply voltage. The chip measurements point to some design flaws that are addressed and noted to be corrected for a possible improved second version of the chip to be taped out.