Full-custom front-end with TDC, for the new RPCs for the ATLAS phase-II upgrade

At the new High-Luminosity Large Hadron Collider, HL-LHC, it will be necessary to upgrade the current level-1 muon trigger of A Toroidal LHC ApparatuS (ATLAS) detector. To support these requests, it is necessary to make sure that the new Resistive plate chambers (RPC) have a higher rate capability, improved space-time resolution: such features will be supported and enabled by faster and more sensitive front-end electronics. Here is the summary of my Ph.D thesis work: • In chapter 1 : The muon spectrometer (MS) of the ATLAS detector will be significantly improved during the Phase-II upgrade in the Long Showdown 3 (LS3) in order to cope with the operational conditions at the HL-LHC in Run 4 and beyond. Additional RPC chambers will be installed in the inner barrel layer to increase the acceptance and robustness of the trigger, and some chambers in high-rate regions will be refurbished. The Phase-II upgrade wil conclude the process of adapting the muon spectrometer to the ever increasing performance of the LHC, which started with the Phase-I upgrade. • In the chapter 2 I explain which improvements are needed for the RPC detectors to obtained better performances and achieve the target requested by the ATLAS exsperiment. • In the chapter 3 I report the results obtained during the tests. I participated in the tests in the data acquisition and set-up phase in the experimental areas together with the INFN Roma 2 - ATLAS Tor Vergata group. In these tests the performance of all the components has been measured on real-size prototypes with a muon beam and the intense gamma source of the Gamma Irradiation Facility (GIF++) facility at CERN where it has been studied; here is summary of the experimental activity: – the gas-gap thickness has been lowered to 1 mm, which is a reasonable minimum for sufficient primary-ionization statistics. A smaller gap provides higher time resolution at lower operating voltage; – the read-out strip-line systems are realized with large-size photo-etched PCB’s to increase the mechanical precision and allow a more complex impedance-compensation scheme, necessary to contain the charge diffusion, and consequently the cluster size; – the front-end electronics are designed and optimized on the specific detector physics: fast short pulses with a very wide amplitude spectrum. The amplifier is based on the concept of fast charge integration with the possibility to match the input impedance to a transmission line. The discriminator is based on the limit amplifier technique, well matching the RPC pulse features, and allowing very small thresholds and a negligible transition region. These are the basis of the outstanding timing performance measured; – time resolution is 350 ps; • In the chapter 4 I describe the mail work that I carried out for the realization of a fullcustom TDC with a resolution of 100 ps. The design that I have implemented is in SiGe 130 nm technology by IHP microelectronics. I will explain the reasons for choosing the SiGe BiCMOS technology, why it is useful to have a custom TDC in the detector front-end, the innovative ideas used to optimize the jitter, to improve the accuracy of the device, to lower power consumption and much more. Finally I will show the results I obtained from the first prototypes that were produced.