Front-End Electronics for Low-Gain Avalanche Detectors

Cosmic-ray experiments in space share a long-standing problem affecting the identification of individual cosmic-ray elemental species with energies larger than hundreds of GeV due to backscattered radiation originating from the calorimeter. Indeed, the backscattered radiation degrades the detector charge resolution whenever it falls onto the same detector element traversed by the incident cosmic ray. As a result, the correct identification of individual atomic nuclei is prevented. Several strategies can be adopted, at a system level, to mitigate the effect of backscattered radiation on the detector. In this regard, spurious signals from backscattering can be prevented by exploiting the difference in the arrival time between the incident particle and the backscattered radiation hitting the detector at a later time instant, being the two events intrinsically separate in time. However, the latter approach requires the development of detectors with sub-nanosecond time resolution capabilities, for Time-of-Flight (ToF) measurements. Therefore, timing requirements should drive the design of upcoming analog front-end readout circuits, targeting low-jitter, low-noise and low-power performance, as well as the choice of appropriate detecting elements. In this regard, in modern particle detectors, Low Gain Avalanche Diodes (LGADs) are being increasingly employed as sensitive elements, since they can provide fast signals for excellent timing performance. In this regard, the present thesis focuses on the development of an analog front-end prototype for the readout of Low Gain Avalanche Diodes to be employed for the design of an innovative particle detector for the next generation of space-borne experiments. The research was conducted as part of the ADA-5D project, funded by the National Institute for Nuclear Physics (INFN, Italy). The system is intended to identify cosmic ray species from hydrogen (atomic number Z = 1) to zirconium (atomic number Z = 40), corresponding to a front-end input range wider than three decades in charge signal. Therefore, to perform both charge and ToF measurements, a high-performance, low-noise and low-jitter readout channel is required. The thesis includes a general discussion about the working principle of Low Gain Avalanche Diodes, together with the state-of-the-art readout solutions adopted in particle detectors, being the major interest in the frame of this work. The core of the thesis is focused on the design of the Application Specific Integrated Circuit (ASIC) developed in the frame of the ADA-5D collaboration, the ADA5Dv0 chip. Following the introduction of the ADA-5D project purpose, specifications, and the challenges posed by the detector requirements, the ADA5Dv0 chip, designed in a commercial 65 nm CMOS technology, is firstly presented from an architectural perspective, discussing on the choice of the right readout chain to be employed in the application of interest. Then, each block in the readout circuit and in the periphery of the matrix is described, motivated, discussed, and analyzed with the help of circuit simulations. The final part of the thesis is dedicated to the characterization of the ADA5Dv0 chip. After a complete description of the measurement setup, including the discussion on the design of a dedicated test-board, measurement results for both the single IP blocks and for the complete readout channels included in the designed ASIC will be presented and discussed. Finally, a few preliminary results obtained from a measurement campaign carried out at the European Organization for Nuclear Research (CERN) in Geneva (Switzerland) are presented. During the campaign, the ADA5Dv0 chip, connected to an LGAD sensor, was tested with an ion beam, demonstrating stable operation under high-rate conditions.