The evolution of power generation has led to significant changes in other parts of the grid, particularly in the transmission and distribution components. Within the framework of the Internet of Energy (IoE), electric power flows more flexibly between various sections of the grid. DC power is expected to play a pivotal role in IoE. Decentralized photovoltaic panels, energy storage systems, electric vehicle charging stations, and data centers are among the key components of future grids that rely on DC power. Consequently, power transformers must be adapted to efficiently manage power distribution across different parts of the grid. Power electronic transformers (PETs), also known as solid-state transformers (SSTs) or smart transformers (STs), offer a promising solution to handle the increasing complexity of power grids. However, one of the major challenges in designing SSTs is that the blocking voltage capabilities of current semiconductor technologies are insufficient for medium voltage levels. As a result, SSTs must be designed using switches with lower voltage ratings. A wide variety of topologies have been proposed in the literature to address this limitation, with multilevel and modular topologies being some of the most prominent solutions. To accommodate diverse loads and generators, this thesis aims to propose a multiport SST based on matrix converters (MCs) tailored for futuristic power grids. Another challenge in multilevel and modular inverters is their inherently complex switching strategies. To address this, the thesis suggests several novel switching strategies to simplify the design process. To validate the proposed solutions, simulations, hardware-in-the-loop (HIL) testing, and prototyping were conducted using LabVIEW and an FPGA-based controller. Keywords: Hardware-in-the-loop (HIL); Internet of Energy (IoE); LabVIEW; Matrix converter (MC); ROMAtrix; Smart Transformer (ST); Solid-state transformer (SST); space vector pulse width modulation (SVPWM).

Solid-state transformers for future energy grid: investigating different topologies and strategies within the framework of the internet of energy

OSTADRAHIMI, AMIR
2025

Abstract

The evolution of power generation has led to significant changes in other parts of the grid, particularly in the transmission and distribution components. Within the framework of the Internet of Energy (IoE), electric power flows more flexibly between various sections of the grid. DC power is expected to play a pivotal role in IoE. Decentralized photovoltaic panels, energy storage systems, electric vehicle charging stations, and data centers are among the key components of future grids that rely on DC power. Consequently, power transformers must be adapted to efficiently manage power distribution across different parts of the grid. Power electronic transformers (PETs), also known as solid-state transformers (SSTs) or smart transformers (STs), offer a promising solution to handle the increasing complexity of power grids. However, one of the major challenges in designing SSTs is that the blocking voltage capabilities of current semiconductor technologies are insufficient for medium voltage levels. As a result, SSTs must be designed using switches with lower voltage ratings. A wide variety of topologies have been proposed in the literature to address this limitation, with multilevel and modular topologies being some of the most prominent solutions. To accommodate diverse loads and generators, this thesis aims to propose a multiport SST based on matrix converters (MCs) tailored for futuristic power grids. Another challenge in multilevel and modular inverters is their inherently complex switching strategies. To address this, the thesis suggests several novel switching strategies to simplify the design process. To validate the proposed solutions, simulations, hardware-in-the-loop (HIL) testing, and prototyping were conducted using LabVIEW and an FPGA-based controller. Keywords: Hardware-in-the-loop (HIL); Internet of Energy (IoE); LabVIEW; Matrix converter (MC); ROMAtrix; Smart Transformer (ST); Solid-state transformer (SST); space vector pulse width modulation (SVPWM).
2025
Inglese
BIFARETTI, STEFANO
Università degli Studi di Roma "Tor Vergata"
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14242/296442
Il codice NBN di questa tesi è URN:NBN:IT:UNIROMA2-296442