In this thesis, the feasibility of using advanced Fin-Field-Effect-Transistors (FinFET) technology nodes to implement broadband, low-noise transimpedance amplifiers (TIA) for low-power, short-reach optical communications was investigated. The candidate technology platform was chosen to be the 12 nm LP+ FinFET technology from GlobalFoundries. After a preliminary technology characterization and comparison with older nodes, a theoretical analysis of inverter-based shunt-feedback TIA topologies was carried out, supported by schematic-level simulations. Such analysis aimed at finding the best TIA sizing and peaking scheme to minimize power consumption while also achieving the desired bandwidth and noise performances. Once the targets were achieved in circuit simulations, the design layout was completed and a chip was fabricated. The chip was experimentally tested, showing good performances, albeit some discrepancies with the simulations were observed. The designed chip proves the feasibility of broadband, low-noise TIA for low-power, short-reach optical links in advanced FinFET nodes. Within the context of the research activities for the present thesis, a Mach-Zehnder modulator driver for coherent optical communications was experimentally tested, whose design, based on novel closed-loop topologies, had been previously carried out by another PhD student at the University of Pavia. Finally, a first design exploration of another optical TIA in GlobalFoundries’ 22 nm Fully-Depleted Silicon-On-Insulator (FDSOI) technology to be used with graphene-based photodetectors was carried out as well. The complete designed is actively being finalized by another PhD student.

ANALYSIS AND DESIGN OF TRANSIMPEDANCE AMPLIFIERS FOR LOW-POWER, SHORT-REACH OPTICAL COMMUNICATIONS IN FINFET TECHNOLOGY

De Prà, Alessio
2026

Abstract

In this thesis, the feasibility of using advanced Fin-Field-Effect-Transistors (FinFET) technology nodes to implement broadband, low-noise transimpedance amplifiers (TIA) for low-power, short-reach optical communications was investigated. The candidate technology platform was chosen to be the 12 nm LP+ FinFET technology from GlobalFoundries. After a preliminary technology characterization and comparison with older nodes, a theoretical analysis of inverter-based shunt-feedback TIA topologies was carried out, supported by schematic-level simulations. Such analysis aimed at finding the best TIA sizing and peaking scheme to minimize power consumption while also achieving the desired bandwidth and noise performances. Once the targets were achieved in circuit simulations, the design layout was completed and a chip was fabricated. The chip was experimentally tested, showing good performances, albeit some discrepancies with the simulations were observed. The designed chip proves the feasibility of broadband, low-noise TIA for low-power, short-reach optical links in advanced FinFET nodes. Within the context of the research activities for the present thesis, a Mach-Zehnder modulator driver for coherent optical communications was experimentally tested, whose design, based on novel closed-loop topologies, had been previously carried out by another PhD student at the University of Pavia. Finally, a first design exploration of another optical TIA in GlobalFoundries’ 22 nm Fully-Depleted Silicon-On-Insulator (FDSOI) technology to be used with graphene-based photodetectors was carried out as well. The complete designed is actively being finalized by another PhD student.
24-feb-2026
MANSTRETTA, DANILO
Università degli studi di Pavia
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14242/358495
Il codice NBN di questa tesi è URN:NBN:IT:UNIPV-358495