Analysis and design of 4H-SiC bipolar mode field effect power (BMFET)

Analysis and design of a new Silicon Carbide polytype 4H (4H-SiC) bipolar power transistor arethe main topics of this Ph.D. thesis. The device is the Bipolar Mode Field Effect Transistor(BMFET) and exploits the electric field due to the channel punching-through in order to have anormally-off behavior and the minority carrier injection from the gate regions into the channel inorder to obtain the channel conductivity modulation. The structure of the transistor is oxide-free andits advantages are due to the lower conduction resistance, to the higher output current density andblocking voltage and to the elevated switching frequency, which make it competitive withcommercial 4H-SiC Junction Field Effect Transistors or Bipolar Junction Transistors.These activities, which have been completed with the definition of the main process steps and ofthe mask layouts, are supported by a technology activity and by an intense modeling activity ofBMFET electrical characteristics, which has been validated by comparisons with the results ofnumerical simulator (ATLAS Silvaco) and the measures of commercial devices having a similarstructure, like Vertical-JFETs.In the former activity, in order to obtain an integrated free-wheeling diode in anti-parallelconfiguration to BMFET, an original 4H-SiC Schottky rectifier has been fabricated; precisely, forthe first time in the literature, DiVanadium PentOxide (V2O5), a Transition Metal Oxide, has beenused as anode contact of the rectifier. The device is a heterojunction between a thin V2O5 layer,which is thermally evaporated and has a thickness of around 5nm, and a 4H-SiC n-type low dopedepilayer. By analyzing the JD-VD and CD-VD curves, the structure has a rectifier behavior with ahigh/low current ratio higher than seven order of magnitude and its transport mechanism isdescribed by the thermionic emission theory characterized by a Schottky barrier height and anideality factor between 0.78eV and 0.85eV and between 1.025 and 1.06, respectively, at T=298K.Because the gate doping concentration greatly influences the BMFET performances, as inputresistance, DC current gain and blocking voltage, Aluminum ion implantation process, used torealize the Gate regions, is strongly analyzed in terms of the dose concentrations and of theannealing temperature. It will show as the necessity of a low BMFET on-resistance, which ispossible with highly conductive gate regions in order to permit high injection levels of the minoritycarriers, is counteracted by the Aluminum incomplete ionization in 4H-SiC. This phenomenontogether with the band-gap narrowing effect limits the hole carrier density from gate to channel.The analysis, in collaboration with the Institute for the Microelectronics and Microsystems (IMM)of CNR in Bologna, Italy, consists to reveal the effects of various different doses at differenttemperature annealing (1920K and 2170K) on the gate injection efficiency and on the input currentdensity.Since the introduction of the first normally-off Si JFET in 80 years, the description of thepotential barrier height into the channel has been unresolved due to the complex relations with thechannel geometry and bias conditions. In the second activity an analytical model of the potentialbarrier height in the channel is proposed and compared with the numerical simulation results bychanging the channel length and width, respectively in the range 0.16m e 0.53m, the channeldoping concentration, between 10141017cm-3, and the output and input bias voltages. Moreover, ithas been also validated by using Silicon as semiconductor material, permitting to extend it to otherdevices with similar structures, like BSITs, VJFETs and SITs. From a further improvement of thismodel, another has been developed, which is able to describe the trans-characteristics of thetransistor both in sub-threshold condition and in unipolar conduction, and the comparisons withnumerical simulations and experimental data validated the results.Finally, the analysis of the input diode during the switching-off has been performed because theswitching capability of the BMFET depends on the storage charge into the channel during the onstate. The result is the development of an analytical model that describes the spatial distributions ofthe electric field, of the minority carrier concentration and of the carrier current densities into theepilayer at each instant during the switching, in addition obviously to the current and voltagetransients. It is shown as the combination of this model with another static model just developed ina previous Ph.D. thesis is an useful instrument to understand how physical parameters, which aredependent on the manufacturing processes, as carrier life-time and doping concentrations, can affectthe dynamic behavior. [edited by Author]